Uprooting defects to enable high-performance III-V optoelectronic devices on silicon.
Journal
Nature communications
ISSN: 2041-1723
Titre abrégé: Nat Commun
Pays: England
ID NLM: 101528555
Informations de publication
Date de publication:
20 09 2019
20 09 2019
Historique:
received:
17
08
2018
accepted:
15
08
2019
entrez:
22
9
2019
pubmed:
22
9
2019
medline:
22
9
2019
Statut:
epublish
Résumé
The monolithic integration of III-V compound semiconductor devices with silicon presents physical and technological challenges, linked to the creation of defects during the deposition process. Herein, a new defect elimination strategy in highly mismatched heteroepitaxy is demonstrated to achieve a ultra-low dislocation density, epi-ready Ge/Si virtual substrate on a wafer scale, using a highly scalable process. Dislocations are eliminated from the epilayer through dislocation-selective electrochemical deep etching followed by thermal annealing, which creates nanovoids that attract dislocations, facilitating their subsequent annihilation. The averaged dislocation density is reduced by over three orders of magnitude, from ~10
Identifiants
pubmed: 31541107
doi: 10.1038/s41467-019-12353-9
pii: 10.1038/s41467-019-12353-9
pmc: PMC6754402
doi:
Types de publication
Journal Article
Research Support, Non-U.S. Gov't
Langues
eng
Sous-ensembles de citation
IM
Pagination
4322Références
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