A semi-holographic hyperdimensional representation system for hardware-friendly cognitive computing.
hardware
hyperdimensional
processor
Journal
Philosophical transactions. Series A, Mathematical, physical, and engineering sciences
ISSN: 1471-2962
Titre abrégé: Philos Trans A Math Phys Eng Sci
Pays: England
ID NLM: 101133385
Informations de publication
Date de publication:
07 Feb 2020
07 Feb 2020
Historique:
entrez:
24
12
2019
pubmed:
24
12
2019
medline:
24
12
2019
Statut:
ppublish
Résumé
One of the main, long-term objectives of artificial intelligence is the creation of thinking machines. To that end, substantial effort has been placed into designing cognitive systems; i.e. systems that can manipulate semantic-level information. A substantial part of that effort is oriented towards designing the mathematical machinery underlying cognition in a way that is very efficiently implementable in hardware. In this work, we propose a 'semi-holographic' representation system that can be implemented in hardware using only multiplexing and addition operations, thus avoiding the need for expensive multiplication. The resulting architecture can be readily constructed by recycling standard microprocessor elements and is capable of performing two key mathematical operations frequently used in cognition, superposition and binding, within a budget of below 6 pJ for 64-bit operands. Our proposed 'cognitive processing unit' is intended as just one (albeit crucial) part of much larger cognitive systems where artificial neural networks of all kinds and associative memories work in concord to give rise to intelligence. This article is part of the theme issue 'Harmonizing energy-autonomous computing and intelligence'.
Identifiants
pubmed: 31865886
doi: 10.1098/rsta.2019.0162
pmc: PMC6939245
doi:
Types de publication
Journal Article
Langues
eng
Sous-ensembles de citation
IM
Pagination
20190162Références
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