Single-Electron Operation of a Silicon-CMOS 2 × 2 Quantum Dot Array with Integrated Charge Sensing.
CMOS
Quantum dot
SET
charge sensing
quantum computing
silicon
Journal
Nano letters
ISSN: 1530-6992
Titre abrégé: Nano Lett
Pays: United States
ID NLM: 101088070
Informations de publication
Date de publication:
11 Nov 2020
11 Nov 2020
Historique:
pubmed:
28
10
2020
medline:
28
10
2020
entrez:
27
10
2020
Statut:
ppublish
Résumé
The advanced nanoscale integration available in CMOS technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot formation and spin blockade in CMOS foundry-compatible devices are encouraging, but results are yet to match the control of individual electrons demonstrated in university-fabricated multigate designs. We show that quantum dots formed in a CMOS nanowire device can be measured with a remote single electron transistor (SET) formed in an adjacent nanowire, via floating coupling gates. By biasing the SET nanowire with respect to the nanowire hosting the quantum dots, we controllably form ancillary quantum dots under the floating gates, thus enabling control of all quantum dots in a 2 × 2 array, and charge sensing down to the last electron in each dot. We use effective mass theory to investigate the ideal geometrical parameters in order to achieve interdot tunnel rates required for spin-based quantum computation.
Identifiants
pubmed: 33108202
doi: 10.1021/acs.nanolett.0c02397
doi:
Types de publication
Journal Article
Langues
eng
Sous-ensembles de citation
IM