Dual-Ferroelectric-Coupling-Engineered Two-Dimensional Transistors for Multifunctional In-Memory Computing.
2D materials
artificial synapse
dual-gate structure
ferroelectric field-effect transistors
logic-in-memory
Journal
ACS nano
ISSN: 1936-086X
Titre abrégé: ACS Nano
Pays: United States
ID NLM: 101313589
Informations de publication
Date de publication:
22 Feb 2022
22 Feb 2022
Historique:
pubmed:
12
2
2022
medline:
12
2
2022
entrez:
11
2
2022
Statut:
ppublish
Résumé
In-memory computing featuring a radical departure from the von Neumann architecture is promising to substantially reduce the energy and time consumption for data-intensive computation. With the increasing challenges facing silicon complementary metal-oxide-semiconductor (CMOS) technology, developing in-memory computing hardware would require a different platform to deliver significantly enhanced functionalities at the material and device level. Here, we explore a dual-gate two-dimensional ferroelectric field-effect transistor (2D FeFET) as a basic device to form both nonvolatile logic gates and artificial synapses, addressing in-memory computing simultaneously in digital and analog spaces. Through diversifying the electrostatic behaviors in 2D transistors with the dual-ferroelectric-coupling effect, rich logic functionalities including linear (AND, OR) and nonlinear (XNOR) gates were obtained in unipolar (MoS
Identifiants
pubmed: 35147405
doi: 10.1021/acsnano.2c00079
doi:
Types de publication
Journal Article
Langues
eng
Sous-ensembles de citation
IM