A Wideband True Time Delay Circuit Using 0.25 µm GaN HEMT Technology.
GaN
phased array antenna
true time delay
Journal
Sensors (Basel, Switzerland)
ISSN: 1424-8220
Titre abrégé: Sensors (Basel)
Pays: Switzerland
ID NLM: 101204366
Informations de publication
Date de publication:
31 Jul 2023
31 Jul 2023
Historique:
received:
21
05
2023
revised:
19
07
2023
accepted:
24
07
2023
medline:
12
8
2023
pubmed:
12
8
2023
entrez:
12
8
2023
Statut:
epublish
Résumé
This paper presents a wideband 4-bit true time delay IC using a 0.25 μm GaN HEMT (High-Electron-Mobility Transistor) process for the beam-squint-free phased array antennas. The true time delay IC is implemented with a switched path circuit topology using DPDT (Double Pole Double Throw) with no shunt transistor in the inter-stages to improve the bandwidth and SPDT (Single Pole Single Throw) switches at the input and the output ports. The delay lines are implemented with CLC π-networks with the lumped element to ensure a compact chip size. A negative voltage generator and an SPI controller are implemented in the PCB (Printed Circuit Board) due to the lack of digital control logic in GaN technology. A maximum time delay of ~182 ps with a time delay resolution of 10.5 ps is achieved at DC-6 GHz. The RMS (Root Mean Square) time delay and amplitude error are <5 ps and <0.6 dB, respectively. The measured insertion loss is <6.8 dB and the input and output return losses are >10 dB at DC-6 GHz. The current consumption is nearly zero with a 3.3 V supply. The chip size including pads is 2.45 × 1.75 mm
Identifiants
pubmed: 37571609
pii: s23156827
doi: 10.3390/s23156827
pmc: PMC10422639
pii:
doi:
Types de publication
Journal Article
Langues
eng
Sous-ensembles de citation
IM
Subventions
Organisme : Agency for Defense Development
ID : UD200027ED