NoC simulation steered by NEST: McAERsim and a Noxim patch.

co-simulation latency multicast network-on-chip simulator neuromorphic computing spiking neural networks

Journal

Frontiers in neuroscience
ISSN: 1662-4548
Titre abrégé: Front Neurosci
Pays: Switzerland
ID NLM: 101478481

Informations de publication

Date de publication:
2024
Historique:
received: 15 01 2024
accepted: 20 05 2024
medline: 5 7 2024
pubmed: 5 7 2024
entrez: 5 7 2024
Statut: epublish

Résumé

Great knowledge was gained about the computational substrate of the brain, but the way in which components and entities interact to perform information processing still remains a secret. Complex and large-scale network models have been developed to unveil processes at the ensemble level taking place over a large range of timescales. They challenge any kind of simulation platform, so that efficient implementations need to be developed that gain from focusing on a set of relevant models. With increasing network sizes imposed by these models, low latency inter-node communication becomes a critical aspect. This situation is even accentuated, if slow processes like learning should be covered, that require faster than real-time simulation. Therefore, this article presents two simulation frameworks, in which network-on-chip simulators are interfaced with the neuroscientific development environment NEST. This combination yields network traffic that is directly defined by the relevant neural network models and used to steer the network-on-chip simulations. As one of the outcomes, instructive statistics on network latencies are obtained. Since time stamps of different granularity are used by the simulators, a conversion is required that can be exploited to emulate an intended acceleration factor. By application of the frameworks to scaled versions of the cortical microcircuit model-selected because of its unique properties as well as challenging demands-performance curves, latency, and traffic distributions could be determined. The distinct characteristic of the second framework is its tree-based source-address driven multicast support, which, in connection with the torus topology, always led to the best results. Although currently biased by some inherent assumptions of the network-on-chip simulators, the results suit well to those of previous work dealing with node internals and suggesting accelerated simulations to be in reach.

Identifiants

pubmed: 38966759
doi: 10.3389/fnins.2024.1371103
pmc: PMC11222605
doi:

Types de publication

Journal Article

Langues

eng

Pagination

1371103

Informations de copyright

Copyright © 2024 Robens, Kleijnen, Schiek and van Waasen.

Déclaration de conflit d'intérêts

MR, RK, MS, and SW were employed by Forschungszentrum Jülich GmbH.

Auteurs

Markus Robens (M)

Central Institute of Engineering, Electronics and Analytics: Electronic Systems (ZEA-2), Forschungszentrum Jülich GmbH, Jülich, Germany.

Robert Kleijnen (R)

Central Institute of Engineering, Electronics and Analytics: Electronic Systems (ZEA-2), Forschungszentrum Jülich GmbH, Jülich, Germany.

Michael Schiek (M)

Peter Grünberg Institute: Neuromorphic Compute Nodes (PGI-14), Forschungszentrum Jülich GmbH, Jülich, Germany.

Stefan van Waasen (S)

Central Institute of Engineering, Electronics and Analytics: Electronic Systems (ZEA-2), Forschungszentrum Jülich GmbH, Jülich, Germany.
Faculty of Engineering, Communication Systems, Duisburg-Essen University, Duisburg, Germany.

Classifications MeSH