Memristor-based circuit design of BiLSTM network.

Bidirectional long short-term memory network Memristor-based circuit design Memristor-based neural network Normalization circuit Resnet circuit

Journal

Neural networks : the official journal of the International Neural Network Society
ISSN: 1879-2782
Titre abrégé: Neural Netw
Pays: United States
ID NLM: 8805018

Informations de publication

Date de publication:
08 Oct 2024
Historique:
received: 08 03 2024
revised: 09 08 2024
accepted: 02 10 2024
medline: 21 10 2024
pubmed: 21 10 2024
entrez: 20 10 2024
Statut: aheadofprint

Résumé

The bidirectional long short-term memory (BiLSTM) network involves significant amount of parameter computations. This paper proposes the memristor-based bidirectional long short-term memory (MBiLSTM) network, with its capability of in-memory computing and parallel computing, can accelerates the parameter computations speed. The MBiLSTM network circuit is composed of normalization circuit, two memristor-based long short-term memory (LSTM) circuits, memristor-based resnet circuit, memristor-based dense circuitand winner-take-all (WTA) circuit. The voltage signals are scaled to the setting range by normalization circuit, memristor-based LSTM circuit is responsible for extracting features from the dataset, memristor-based resnet circuit can enhance the overall performance of the network, memristor-based dense circuit ensures that the final outputs dimension matches the dimension of the target signals, WTA circuit outputs the maximum voltage of memristor-based dense circuit. The effectiveness of the MBiLSTM network is validated through gait recognition experiment and handwritten digit recognition experiment. The stability, robustness and potential errors in the manufacturing process of memristance are analyzed.

Identifiants

pubmed: 39427413
pii: S0893-6080(24)00704-4
doi: 10.1016/j.neunet.2024.106780
pii:
doi:

Types de publication

Journal Article

Langues

eng

Sous-ensembles de citation

IM

Pagination

106780

Informations de copyright

Copyright © 2024. Published by Elsevier Ltd.

Déclaration de conflit d'intérêts

Declaration of competing interest The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

Auteurs

Le Yang (L)

School of Electrical and Information Engineering, Wuhan Institute of Technology, Wuhan 430205, China.

Jun Lei (J)

School of Electrical and Information Engineering, Wuhan Institute of Technology, Wuhan 430205, China.

Ming Cheng (M)

School of Electrical and Information Engineering, Wuhan Institute of Technology, Wuhan 430205, China.

Zhixia Ding (Z)

School of Electrical and Information Engineering, Wuhan Institute of Technology, Wuhan 430205, China.

Sai Li (S)

School of Electrical and Information Engineering, Wuhan Institute of Technology, Wuhan 430205, China.

Zhigang Zeng (Z)

School of Artificial Intelligence and Automation, Huazhong University of Science and Technology, Wuhan 430074, China. Electronic address: zgzeng@hust.edu.cn.

Classifications MeSH